“6th National FPGA Design Competition 2021” was organized by Digitronix Nepal and Logitronix held on 11th September 2021 through online medium. This is a national level competition with a total of 7 participants from 7 different Engineering Colleges of Nepal.
The winner of this competition was “IMPLEMENTATION OF OPTIMIZED VEDIC MULTIPLICATION CORE IN VERILOG AND XILINZ ZYNQ FPGA”, designed by Santosh Shaha of Kathmandu University.
Among all the projects, the best project idea is awarded to “QPSK MODULATION AND DEMODULATION IN FPGA FOR WIRELESS COMMUNICATION” presented by Sanuj Kumar Shah, Rajal Baral, Bikesh Dhonju and Pramod Karki, students from Khwopa Engineering College.
This project “QPSK Modulation and Demodulation in FPGA for Wireless Communication” was specially designed to transmit QPSK signal modulation wirelessly and demodulate it. It is used to transmit different types of data e.g. voice signal, video signal etc. Since it is faster operating and consumes less power, it can also be used for satellite communication.
This project takes two bit input from user through Zybo board and modulates it and transmits to the NRF module. The NRF module then transmits the data wirelessly to another NRF module at the receiver end. The received signal is again demodulated to retain the original signal in Zybo board.